The present invention generally relates to improving lithography. In particular, the present invention relates to using an RTA furnace to controllably bake a photoresist.
In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve these high densities there has been and continues to be efforts toward scaling down the device dimensions on semiconductor wafers. In order to accomplish such high device packing density, smaller and smaller features sizes are required.
The requirement of small features (and close spacing between adjacent features) requires high resolution lithographic processes. In general, lithography refers to processes for pattern transfer between various media. It is a technique used for integrated circuit fabrication in which a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the photoresist, and an exposing source (such as optical light, X-rays, or an electron beam) illuminates selected areas of the surface through an intervening master template, the photomask, for a particular pattern. The lithographic coating is generally a radiation-sensitized coating suitable for receiving a projected image of the subject pattern. Once the image is projected, it is indelibly formed in the coating. Exposure of the coating through the photomask causes a chemical transformation in the exposed areas of the coating thereby making the image area either more or less soluble (depending on the coating) in a particular solvent developer. The more soluble areas are removed in the developing process to leave the pattern image in the coating as less soluble polymer.
Prior to contact with the developer, the irradiated photoresist is baked in a convection oven to promote completely the chemical transformation in the exposed areas of the photoresist. For example, photoresists containing a photoacid generator undergo an acid catalyzed reaction in its radiation exposed areas, and this reaction is facilitated by elevated temperatures. After it is determined that the chemical transformation in the exposed areas is complete, the irradiated photoresist covered substrate is removed from the convection oven and placed on a chill plate. The chill plate serves to lower the temperature of the substrate, which in turn, helps to terminate the chemical transformation in the exposed areas of the photoresist. However, while the heating and cooling promote the chemical reactions within the irradiated photoresist material, current methods of heating and cooling in many instances decrease the critical dimension control of the subsequently developed photoresist. Given the trend toward higher device densities, decreases in critical dimension control are unacceptable when developing new methods of lithography.
Moreover, consistently and accurately patterning features having dimensions of about 0.25 xcexcm or less, and particularly below about 0.18 xcexcm or less, with acceptable resolution is difficult at best, and impossible in some circumstances. Since projection lithography is a powerful and essential tool for microelectronics processing, procedures that increase resolution, improve critical dimension control, and consistently and accurately provide small features are desired.
The present invention provides improved lithographic methods and systems by controlling the chemical processing within an irradiated photoresist material prior to development. The present invention also provides methods and systems for forming photoresist features having improved critical dimension control. The photoresist features with improved critical dimension control of the present invention are particularly useful for subsequent semiconductor processing procedures and products made with such procedures.
In one embodiment, the present invention relates to a method of processing an irradiated photoresist involving the steps of placing a substrate having the irradiated photoresist thereon at a first temperature in a rapid thermal anneal furnace; heating the substrate having the irradiated photoresist thereon to a second temperature within about 0.1 seconds to about 10 seconds; cooling the substrate having the irradiated photoresist thereon to a third temperature in a rapid thermal annealing furnace within about 0.1 seconds to about 10 seconds; and developing the irradiated photoresist, wherein the second temperature is higher than the first temperature and the third temperature.
In another embodiment, the present invention relates to a method of improving critical dimension control of a photoresist involving the steps of depositing the photoresist on a semiconductor substrate; selectively irradiating the photoresist; heating the semiconductor substrate having the irradiated photoresist thereon under an atmosphere containing an inert gas from a first temperature to a second temperature from about 20xc2x0 C. to about 200xc2x0 C. and cooling the semiconductor substrate having the irradiated photoresist thereon to a third temperature in a rapid thermal annealing furnace in a period of time from about 1 second to about 10 minutes; and developing the heated irradiated photoresist.
In yet another embodiment, the present invention relates to a a system of processing a photoresist, containing a source of actinic radiation and a mask for selectively irradiating a photoresist; a rapid thermal annealing furnace for rapidly heating and rapidly cooling a selectively irradiated photoresist, wherein the rapid heating and rapid cooling are independently conducted within about 0.1 seconds to about 10 seconds; and a developer for developing a rapid thermal annealing furnace heated and selectively irradiated photoresist into a patterned photoresist.